Article HighlightsError awareness is a unique capability made possible by D-Wave’s dual-rail gate-model architecture, combining error detection and real-time control to provide visibility into errors as they occur and the ability to respond to them during computation. This capability gives users new tools and data for achieving fault tolerance and exploring advanced post-NISQ use cases. Here’s what you need to know:
Last week, we launched our gate-model quantum computing simulator beta program, marking an important milestone in D-Wave's gate-model development roadmap. Through the program, leading commercial and research organizations gain early access to D-Wave's gate-model simulator in advance of its general availability.
Participants in the simulator beta program include BBVA, a multinational financial services company based in Spain; FirstQFM, a quantum machine learning company based in Sweden; Florida Atlantic University; and the Jülich Supercomputing Centre in Germany.
For the first time, users will have the opportunity to experiment with error-aware programming in preparation for D-Wave's forthcoming gate-model systems.
But what is error awareness, and why does it matter for gate-model quantum computing?
It’s become increasingly clear that one of the greatest challenges to building practical, fault-tolerant gate-model quantum computers isn’t adding more qubits. It’s efficient error correction. At D-Wave, we believe error awareness is a critical step in overcoming that challenge.
Qubits are notoriously fragile and highly sensitive to noise. Even minor disturbances, such as electromagnetic interference or temperature fluctuations, can introduce computational errors. As quantum systems scale, these errors can accumulate and, if left uncorrected, cause the computation to fail. Effective quantum error correction is essential to scale gate-model systems capable of solving useful, real-world problems in areas such as quantum chemistry, fluid dynamics, and materials science.
In many gate-model architectures, quantum error correction requires immense amounts of quantum and classical resources, creating substantial engineering complexity, cost, and performance constraints. Emerging, resource-efficient approaches to error correction are expected to reduce this overhead dramatically, but the industry has not yet reached a scale where these approaches can be applied to near-term use cases.
D-Wave takes a different approach. With error awareness, the location of a detected error can be identified at the physical-qubit level as it occurs, allowing quantum software to adapt to those errors while the computation is still running.
We believe this unique capability, enabled by D-Wave's dual-rail qubit architecture, creates a more efficient path to quantum error correction and, ultimately, fault-tolerant gate-model quantum computers.
Quantum error awareness provides visibility into errors as they occur and the ability to respond to them during computation, reducing the resources required for error correction. Through a combination of error detection and real-time quantum-classical control, error awareness gives users new tools and data for achieving fault tolerance and exploring advanced post-noisy intermediate-scale quantum (post-NISQ) use cases.
Error awareness is made possible by the error detection capabilities of D-Wave's dual-rail architecture. In dual-rail qubits, the most common errors are photon-loss events. The hardware can detect these errors and identify the affected qubit, allowing the error to be treated as an erasure: an error with a known location. Because the error-correction system knows where the errors are, it can correct them using fewer resources than it would need for errors of unknown type and location.
Real-time quantum-classical control makes that error information actionable. Rather than waiting until the QPU has completed a run, the classical processor analyzes data while the quantum algorithm is still running and within the qubits’ coherence time. The system can then use the information to adapt subsequent quantum operations.
By combining built-in error detection and real-time control, error awareness could substantially reduce the hardware required for fault-tolerant quantum computing. We predict that, with our approach, achieving a logical error rate of 10−6, or one error in one million operations, could require only 100 to 200 physical qubits per logical qubit. This could represent up to a 10-fold reduction in physical-qubit requirements compared with conventional architectures.
Recent peer-reviewed research published in Nature validated D-Wave's dual-rail technology as a scalable foundation for commercial, fault-tolerant gate-model quantum computing. The research demonstrated a high-speed two-qubit entangling gate that achieved 99.9% fidelity when measured using error detection, while preserving the dual-rail architecture’s built-in error-detection advantages.
We believe this combination of high-fidelity qubits, hardware efficiency, and fast gate speeds provides the performance needed to support meaningful R&D, allowing researchers to move beyond theoretical models and work with real system behavior.
D-Wave's gate-model quantum computing simulator will help developers start preparing for the era of error-aware quantum computing. We believe the simulator, built around the dual-rail architecture, is the first of its kind designed for error-aware programming. Visibility into error data will enable developers to better understand quantum behavior, develop and test error-aware algorithms and quantum error-correction techniques, and prototype post-NISQ applications today.
The simulator is accessible through D-Wave’s Leap™ quantum cloud platform and integrates with development tools, including D-Wave’s Ocean™ SDK and Qiskit. Developers can also use D-Wave’s Quantum Circuit Description Language (QCDL) API to build and run advanced error-aware quantum applications and workflows.
We plan to offer flexible development bundles that combine access to the simulator and future gate-model systems with expert guidance to streamline onboarding and support research and development. With forthcoming gate-model capabilities alongside annealing and analog-digital approaches, the platform will expand how developers can engage with quantum computing, offering hands-on exposure to multiple technologies within a single ecosystem.
We’re very excited to see the results that come out of the beta program and look forward to sharing the work that our beta customers accomplish. If you’d like to stay in the loop, sign up for updates, request future access, and be among the first to program with D-Wave's error-aware simulator:
Request Access to D-Wave's Gate-Model Simulator →
Andrei Petrenko spearheads the gate-model product strategy at D-Wave with a keen focus on fostering a strong customer ecosystem and user experience with the company’s unique dual-rail qubit architecture. He has nearly 15 years of experience in quantum computing across industry and academia. His background is in quantum hardware, and he received his Ph.D. from Yale University in the lab of Professor Rob Schoelkopf, focusing on quantum error correction.
