New Architecture for Scalable Gate-Model Quantum Computing
D-Wave is developing gate-model quantum computing technology to make quantum errors easier to detect, understand, and correct as systems scale.
Built on a high-performance superconducting architecture, D-Wave gate-model technology is designed for fast operations and high fidelity. Native error detection will give researchers new ways to explore error-aware algorithms and quantum error correction.
"As part of D-Wave’s broader dual-platform strategy, gate-model technology will complement our production-ready annealing systems. This will expand the range of computationally complex problems organizations can explore as quantum computing matures, including areas such as quantum chemistry, materials science, and AI."
- Dr. Alan Baratz, CEO of D-Wave
What Researchers Will Be Able to Explore
D-Wave gate-model technology is designed to support advanced quantum research, including error-aware exploration. Error awareness is a unique capability enabled by D-Wave dual-rail technology that harnesses the power of error detection to give users new data and insight for achieving fault tolerance and exploring advanced use cases.
Key research capabilities include:
- Error-aware algorithm development
- Quantum error correction techniques
- Real-time quantum-classical control
- Programming through D-Wave's software ecosystem
- Integration with familiar frameworks
- Forthcoming error-aware simulation
D-Wave's forthcoming gate-model quantum computing simulator is expected to enable error-aware programming.
Promising Gate-Model
Use Cases
Gate-model quantum computing is expected to expand the range of problems organizations can explore.
- Quantum chemistry and molecular R&D: Explore molecular structure analysis, drug discovery research, and industrial chemistry applications.
- Materials, catalysts, and energy systems: Investigate battery materials, catalyst design, and advanced materials simulation.
- Quantum AI and machine learning: Evaluate opportunities in model development, natural language processing, and workflow optimization.
- Financial modeling and analytics: Assess future approaches to complex data analysis, pricing models, and risk-related workflows.
- Quantum-era cybersecurity readiness: Prepare for the long-term implications of quantum computing on cryptography and digital infrastructure.
Four Pillars of D-Wave’s Gate-Model Architecture
Built-In Error Detection Through Dual-Rail Qubits
Fast, High-Fidelity Performance from Superconducting Architecture
Error-Aware Exploration Through Feature-Rich Programming
Unified Access Across a Full-Stack Quantum Platform
Built-In Error Detection Through Dual-Rail Qubits
D-Wave’s gate-model technology starts with a dual-rail qubit architecture that embeds error detection at the physical hardware level. This approach makes the dominant error detectable at the single qubit level during execution, helping researchers understand system dynamics and creating a stronger foundation for exploring quantum error correction.
Fast, High-Fidelity Performance from Superconducting Architecture
D-Wave’s gate-model technology is designed to deliver the speed, fidelity, and consistent performance needed to explore post-NISQ applications. Combined with dual-rail qubits, this high-performance superconducting architecture supports a more efficient path to error correction, helping reduce the physical-qubit overhead required to scale toward fault-tolerant quantum computing.
Error-Aware Exploration Through Feature-Rich Programming
D-Wave’s gate-model technology is being developed to support advanced programming capabilities, including built-in error detection and real-time quantum-classical control.
Researchers will be able to develop and test error-aware algorithms and quantum error correction techniques natively, using error information as part of the research workflow. D-Wave’s Quantum Circuit Description Language (QCDL) programming model will provide deep control over system behavior, while seamless integrations with quantum frameworks will allow users to work within familiar environments.
Unified Access Across a Full-Stack Quantum Platform
D-Wave’s gate-model architecture is being developed as part of a full-stack hardware-software platform, and is expected to be accessible through D-Wave’s Leap™ quantum cloud service. Users will be able to work with simulators, QPUs, development tools, documentation, and support within a unified environment designed for advanced quantum research.
DR17
2026
DR49
2027
DR181
2028
Gate-Model
Roadmap
Key roadmap milestones for D-Wave’s gate-model program include:
- 2026: Completion of a 17-physical-qubit dual-rail system that supports logical error rates 2 times lower than physical error rates
- 2027: Completion of a 49-physical-qubit system that can deliver an expected 20-fold error reduction factor over the physical error rate
- 2028: Completion of a 181-physical-qubit system that can deliver an expected 2,000-fold error reduction factor over the physical error rate, representing the scalable blueprint for fault-tolerant architectures
- 2030: Completion of a 10-logical-qubit system that can support the first fault-tolerant algorithms
- 2032: Completion of a 100-logical-qubit system capable of successfully performing more than 1 million operations that can support initial quantum chemistry and quantum AI applications
One Quantum Computing Company, More Ways to Solve
D-Wave is the only company developing both annealing and gate-model quantum computing across systems, software, and services.
Annealing quantum computing is delivering value today for optimization, quantum simulation, and AI. D-Wave’s gate-model roadmap is focused on an achievable path to error correction and fault tolerance through its differentiated dual-rail architecture.
Together, these approaches support D-Wave’s commitment to helping customers access the right quantum technology for the right problem.
Explore D-Wave’s Gate-Model Architecture
Connect with D-Wave to learn how gate-model technology can support research applications, and advanced computing strategy.